This invention pertains to integrated circuit manufacturing processes and, more particularly, to a manufacturing process that passivates the surface of an integrated circuit.
To protect an integrated circuit, it is common to apply a passivation layer, for example, a layer of phosphoric silane glass (PSG), to the surface of the integrated circuit to act as a barrier to prevent corrosive chemicals from reaching the integrated circuit. There are several problems, however, that arise when PSG and similar passivation layers are used, without further passivation, to protect an integrated circuit in a non-hermetically sealed package, such as a plastic chip carrier. First, these passivation layers do not and can not be used to passivate aluminum bonding pads. Since aluminum is corrosion sensitive, prolonged exposure to environmental chemicals can corrode the aluminum bonding pads. Second, environmental moisture can enter small cracks in the passivation layer and combine with certain elements in the passivation to form corrosive chemicals, such as phosphoric acid, which can attack the underlying circuit, in particular, aluminum runners.
To overcome these problems, polyimide and metals have been used in the past to provide additional passivation. FIG. 1 illustrates an integrated circuit that has been passivated using the prior art etch-back process. Generally, the prior art process for applying this additional passivation begins with the application of a polyimide layer 102 to the surface of the integrated circuit wafer 104, followed by the use of photolithographic techniques to open up windows over the bonding pads 106. Next, one or more layers of metals 108 are applied and, using photolithographic techniques, the metal layer is etched-back such that each bonding pad now comprises an underlying layer of aluminum topped with one or more layers of metals.
One disadvantage of the prior art process is that it uses a metal etching step, thereby subjecting the underlying corrosion sensitive aluminum metallization to some risk. The prior art process also involves a number of photolithographic steps, and, for cost reduction, it would be desirable if the number of photolithographic steps could be reduced.